RTL8710 and OpenOCD

Post your RTL8710 based projects and build logs here
kissste
Posts: 53
Joined: Fri Aug 12, 2016 3:43 am
Location: ON, Canada

Re: RTL8710 and OpenOCD

Postby kissste » Tue Sep 13, 2016 4:41 am

I have moved on to JTAG.

1/ My B&T RTL00-V1.0 boards from ebay contain a different CPUID

Info : JTAG tap: rtl8710.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)

Error: JTAG tap: rtl8710.cpu expected 1 of 1: 0x2ba01477 (mfg: 0x23b (ARM Ltd.), part: 0xba01, ver: 0x2)

2/ After changing rtl8710 to my targert ID
.......
Info : 274 330 core.c:959 jtag_examine_chain_display(): JTAG tap: rtl8710.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Debug: 275 332 core.c:1190 jtag_validate_ircapture(): IR capture validation scan
Debug: 276 333 core.c:1248 jtag_validate_ircapture(): rtl8710.cpu: IR capture 0x01
Debug: 277 334 openocd.c:148 handle_init_command(): Examining targets...
Debug: 278 335 target.c:1510 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 279 335 arm_adi_v5.c:603 dap_dp_init():
Debug: 280 335 arm_adi_v5.c:636 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 281 337 arm_adi_v5.h:428 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
Debug: 282 338 adi_v5_jtag.c:572 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT 0xffffffff
Error: 283 340 adi_v5_jtag.c:582 jtagdp_transaction_endcheck(): JTAG-DP STICKY ERROR
Debug: 284 340 adi_v5_jtag.c:584 jtagdp_transaction_endcheck(): JTAG-DP STICKY OVERRUN
Debug: 285 340 arm_adi_v5.c:636 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 286 341 arm_adi_v5.h:428 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
Error: 287 342 adi_v5_jtag.c:376 jtagdp_overrun_check(): Invalid ACK (6) in DAP response
Last edited by kissste on Tue Sep 13, 2016 2:47 pm, edited 1 time in total.

BasilFX
Posts: 15
Joined: Thu Aug 18, 2016 5:28 pm

Re: RTL8710 and OpenOCD

Postby BasilFX » Tue Sep 13, 2016 8:22 am

kissste wrote:1/ My B&T RTL00-V1.0 boards from ebay contain a different a different CPU


Encountered the same. Changed the ID and warnings disappeared.

kissste wrote:2/ After changing rtl8710 to my targert ID


Looks like a similar error to the one before you were using JTAG.

Sometimes the RTL8710 is already booted into (user) firmware, which may have disabled the JTAG/SWD pins. Try to powercycle it until it works, at least that is what I found working.

kissste
Posts: 53
Joined: Fri Aug 12, 2016 3:43 am
Location: ON, Canada

Re: RTL8710 and OpenOCD

Postby kissste » Tue Sep 13, 2016 2:50 pm

BasilFX wrote:
kissste wrote:
kissste wrote:2/ After changing rtl8710 to my targert ID


Looks like a similar error to the one before you were using JTAG.

Sometimes the RTL8710 is already booted into (user) firmware, which may have disabled the JTAG/SWD pins. Try to powercycle it until it works, at least that is what I found working.


Pulling CH_EN up has solved my PARITY JTAG issue. All is working now. Thank you.

desoxyribonucleic
Posts: 3
Joined: Sun Aug 28, 2016 6:57 pm

Re: RTL8710 and OpenOCD

Postby desoxyribonucleic » Sun Oct 16, 2016 7:22 am

I'm also trying to get JTAG to work using the bus pirate.

I am using the RTL00 module as well, from ebay, and I had to change the CPU TAP ID to 0x4ba00477 too (apparently this is a generic value?)

However, the JTAG communication fails right after identification:

Code: Select all

Info : Buspirate Interface ready!
Info : This adapter doesn't support configurable speed
Info : JTAG tap: rtl8710.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction


I triple-checked the connections so I don't think the problem is electrical. It looks like the chip it is booting into the regular mode with UART output.
I tried pulling CHIP_EN high but that didn't make any difference.

Any ideas what might be going wrong?

BasilFX
Posts: 15
Joined: Thu Aug 18, 2016 5:28 pm

Re: RTL8710 and OpenOCD

Postby BasilFX » Sun Oct 16, 2016 11:30 pm

desoxyribonucleic wrote:I'm also trying to get JTAG to work using the bus pirate.

I am using the RTL00 module as well, from ebay, and I had to change the CPU TAP ID to 0x4ba00477 too (apparently this is a generic value?)

However, the JTAG communication fails right after identification:

Code: Select all

Info : Buspirate Interface ready!
Info : This adapter doesn't support configurable speed
Info : JTAG tap: rtl8710.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Warn : Invalid ACK 0x7 in JTAG-DP transaction


I triple-checked the connections so I don't think the problem is electrical. It looks like the chip it is booting into the regular mode with UART output.
I tried pulling CHIP_EN high but that didn't make any difference.

Any ideas what might be going wrong?


Just keep trying, which succeeds for me from time to time :-)

I haven't found a way to have success all the time.

desoxyribonucleic
Posts: 3
Joined: Sun Aug 28, 2016 6:57 pm

Re: RTL8710 and OpenOCD

Postby desoxyribonucleic » Mon Oct 17, 2016 10:16 pm

BasilFX wrote:Just keep trying, which succeeds for me from time to time :-)

I haven't found a way to have success all the time.

I tried many dozens of time already, checked the connections, etc. :oops:
Sometimes (maybe ~5% of the time) the ID doesnt work either (all 0xFF) and then works after a few retries.
Apparently at least some of the JTAG communication is working...

How many times did you try before it worked?

grypho
Posts: 2
Joined: Mon Mar 13, 2017 7:49 am

Unbrick RTL8710 / Cannot connect using OpenOCD

Postby grypho » Mon Mar 13, 2017 7:59 am

Hey everyone,

yesterday I did some work on the toolchain / linker file / compilation process. I tried to start with rebane's work (which is awesome) and tried to build a debuggable image with correct RAM addresses within the ELF file. So far, everything looked good and the image was accepted by the chip. But slightly after entering my code the chip crashed with a HardFault error:

Code: Select all

=========================================================

ROM Version: 0.3

Build ToolChain Version: gcc version 4.8.3 (Realtek ASDK-4.8.3p1 Build 2003)

=========================================================
Check boot type form eFuse
SPI Initial
Image1 length: 0x88, Image Addr: 0x10000bc8
Image1 Validate OK, Going jump to Image1
RTL8195A[HAL]: Hard Fault Error!!!!
RTL8195A[HAL]: R0 = 0x1
RTL8195A[HAL]: R1 = 0x1
RTL8195A[HAL]: R2 = 0x100001
RTL8195A[HAL]: R3 = 0x10000be8
RTL8195A[HAL]: R12 = 0x1c
RTL8195A[HAL]: LR = 0x44c77
RTL8195A[HAL]: PC = 0x10000be8
RTL8195A[HAL]: PSR = 0x200
RTL8195A[HAL]: BFAR = 0x8
RTL8195A[HAL]: CFSR = 0x20000
RTL8195A[HAL]: HFSR = 0x40000000
RTL8195A[HAL]: DFSR = 0x0
RTL8195A[HAL]: AFSR = 0x0
RTL8195A[HAL]: PriMask 0x0
RTL8195A[HAL]: BasePri 0x0
RTL8195A[HAL]: SVC priority: 0x00
RTL8195A[HAL]: PendSVC priority: 0x00
RTL8195A[HAL]: Systick priority: 0x00


My problem is that it seems the chip is bricked. I've tried my ST-LINK using SWD/OpenOCD to connect to the chip which is no longer recognized and also tried a J-Link using JTAG. In both cases the voltage is correctly detected but the ChipID cannot be read (it seems like the Debug-Port is completely disabled). In J-Flash I get

Code: Select all

Connecting ...
 - Target interface speed: 100 kHz (Fixed)
 - VTarget = 3.254V
 - Executing init sequence ...
    - Executing Reset (0, 0 ms)
    - ERROR: Could not perform target reset
 - ERROR: Failed to connect.
Could not perform custom init sequence.


Any Ideas how to unbrick the device?

Note: I've also connected CHIP_EN to the JTAG RESET signal, no change.

kissste
Posts: 53
Joined: Fri Aug 12, 2016 3:43 am
Location: ON, Canada

Re: RTL8710 and OpenOCD

Postby kissste » Mon Mar 13, 2017 9:52 pm

The bootloader is good. It manages to jumps to Image1.

Therefore, you should you be able to SWD/JTAG it, even if your 1st instruction was to disable the JTAG port.

Just trying timing it, "glitch".

Make sure, it's stable. 3.3V+capacitor, and pull up CH_EN (with a resistor), and pull it down to ground to reset.

grypho
Posts: 2
Joined: Mon Mar 13, 2017 7:49 am

Re: RTL8710 and OpenOCD

Postby grypho » Fri Mar 17, 2017 2:11 pm

Thanks for the fast reply.

I've checked everything twice, tried JTAG and SWD with several adapters and also tried to create a racing condition and to connect before Image1 was started. Nevertheless I was not able to create a connection to the device. I've several years of experience with M3,M4 and M0+ cores and I never got into a situation where I bricked the core in such a way.

I've desoldered it from the board and soldered another which can be accessed normally. Because that one is my last module (more are ordered from China) I will first try to read out some code sections and try to understand what happens before Image1.

Thanks for your help ;-)


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